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Design and FPGA implementation of matrix transforms for image and video processing

Başlık çevirisi mevcut değil.

  1. Tez No: 523544
  2. Yazar: İSA SERVAN UZUN
  3. Danışmanlar: Prof. A. AMIRA
  4. Tez Türü: Doktora
  5. Konular: Bilgisayar Mühendisliği Bilimleri-Bilgisayar ve Kontrol, Elektrik ve Elektronik Mühendisliği, Computer Engineering and Computer Science and Control, Electrical and Electronics Engineering
  6. Anahtar Kelimeler: Belirtilmemiş.
  7. Yıl: 2006
  8. Dil: İngilizce
  9. Üniversite: Queen's University Belfast
  10. Enstitü: Yurtdışı Enstitü
  11. Ana Bilim Dalı: Belirtilmemiş.
  12. Bilim Dalı: Belirtilmemiş.
  13. Sayfa Sayısı: 229

Özet

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Özet (Çeviri)

Matrix transforms are indispensable operations in many real world image and video processing applications including emerging compression standards such as JPEG2000 for image compression and MPEG4 for video compression, medical and military imaging and computer vision. The nature of these applications involves performing complex tasks, mainly matrix transforms, repeatedly on a large set of image data, often under real-time requirements. Therefore, there is a need for high performance systems while keeping architectures °exible to allow for quick upgrade- ability. A close examination of the algorithms used in these, and related, applica- tions reveals that many of the fundamental actions involve matrix transforms such as Fast Fourier Transform (FFT), Fast Hartley Transform (FHT), Discrete Wavelet Transform (DWT), and Curvelet transform. The direct computation of matrix transforms requires intensive computation power. However, as the number of applications for matrix transforms continues to grow and includes such diverse areas as: communications, signal processing, instru- mentation, biomedical engineering, sonics and acoustics, numerical methods, and particularly image and video applications, algorithms for their e±cient computation and hardware implementations targeting real-world applications have gained more attention. Recently, recon¯gurable hardware devices in the form of Field Programmable Gate Arrays (FPGAs) have been proposed as viable system building blocks in the construction of high performance systems at an economical price. Given the impor- tance and the use of matrix transforms in image and video processing applications, it seems an ideal candidate to harness and exploit the advantages o®ered by FPGAs. The main objectives of the work presented in this thesis can be summarised as follows: ² To develop scalable and parametrisable architectures for a range of large 1-D and 2-D matrix transform cores suitable for use in both general purpose and speci¯c image and video processing problems and applications. The matrix transforms include FFT, Discrete Biorthogonal Wavelet Transform (DBWT), Curvelet transform and its building blocks; ² To evaluate the e®ectiveness of FPGA platforms in providing acceleration for matrix transforms based applications; ² To investigate the best performance trade-o®s such as area/speed for matrix transforms implementation on FPGAs; and ² To develop a software tool for e±cient generating matrix algorithms cores for general purpose use or for speci¯c applications, which enables application users concentrate on experimenting conveniently with di®erent algorithms and techniques rather than concentrating on the low level (and complex) structure of FPGAs. The work described in this thesis has developed a range of matrix transform algorithm cores suitable for use in both general purpose and speci¯c image and video processing problems and applications. The suitability of these cores for large transform sizes has also been addressed. A software tool has been developed to automatically and e±ciently generate matrix cores that are customised to meet the application requirements. The proposed matrix transform architectures have been implemented using hybrid approaches and prototyped on the RC1000 FPGA board. Results achieved have shown better performances in comparison with existing structures and systems.

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