SiGe constructive wave oscillator based terahertz frequency multipliers
Başlık çevirisi mevcut değil.
- Tez No: 403429
- Danışmanlar: Dr. NUMAN S. DOĞAN
- Tez Türü: Doktora
- Konular: Elektrik ve Elektronik Mühendisliği, Electrical and Electronics Engineering
- Anahtar Kelimeler: Belirtilmemiş.
- Yıl: 2017
- Dil: İngilizce
- Üniversite: North Carolina A&T State University
- Enstitü: Yurtdışı Enstitü
- Ana Bilim Dalı: Belirtilmemiş.
- Bilim Dalı: Belirtilmemiş.
- Sayfa Sayısı: 132
Özet
Özet yok.
Özet (Çeviri)
The constructive-wave oscillator is a new technology that is capable of producing high frequency oscillation signals in the low THz frequency range. CWO is a cascade connected version of constructive wave amplifiers [1] and has the advantage of direction control of the traveling-wave over a rotary-traveling wave oscillator (RTWO). The direction of the traveling-wave in CWO is deterministic, i.e., set by the designer. In an RTWO wave, the direction is mainly determined by mismatches in the circuit and thus the traveling-wave direction is non-deterministic. One has to use special techniques to force the wave to rotate in a desired direction [2]. Constructive-wave oscillator was proposed and demonstrated at 92 GHz by Gathman and Buckwalter [3]. The objective of this research is to extend this CWO concept and to work further by designing six and eight-section CWOs. In addition, by taking advantage of this new design, the main purpose is to extend frequency range by designing tripler - quadrupler frequency multipliers that produce an output signal in the mid-THz range. These research objectives were met by using simulation, design, and implementation. Different structures of CWO designs having various ring size and amplification stages were planned, designed, implemented, and tested. Throughout this research, Agilent ADS, Cadence EDA, SONNET and HFSS software packages were used for simulation and layout purposes. Real chip implementation was done in a 0.13-μm SiGe BiCMOS process. Also the Altium PCB Designer was used for the PCB design to test the chip in a real environment. The performance simulation with the aid of the explanatory diagrams and figures and measurement results are presented.
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