DVB-S alıcısı için ileri hata düzeltme birimi gerçeklemesi
Implementation of forward error correction unit for DVB-S receiver
- Tez No: 352278
- Danışmanlar: DOÇ. DR. MESUT KARTAL
- Tez Türü: Yüksek Lisans
- Konular: Elektrik ve Elektronik Mühendisliği, Electrical and Electronics Engineering
- Anahtar Kelimeler: Belirtilmemiş.
- Yıl: 2013
- Dil: Türkçe
- Üniversite: İstanbul Teknik Üniversitesi
- Enstitü: Fen Bilimleri Enstitüsü
- Ana Bilim Dalı: Elektronik ve Haberleşme Mühendisliği Ana Bilim Dalı
- Bilim Dalı: Telekomünikasyon Mühendisliği Bilim Dalı
- Sayfa Sayısı: 85
Özet
Tez çalışması, uydu haberleşme sistemleri aracılığıyla yapılan sayısal video çoğul ortam yayınlarının alıcı tarafında kulanılan ileri hata düzeltme birimi tasarımı ve gerçeklemesini kapsamaktadır. Bu kapsamda Sayısal Video Yayını organizasyonu tarafından belirtilen standartlar göz önüne alınmıştır. Tasarlanan kod çözme birimleri ve ters-serpiştirme işlemi standartlarda belirtilen parametrik değerler dikkate alınarak benzetimleri MATLAB ve Maple yardımı ile yapılmış olup VHDL kullanılarak başarılı bir şekilde donanımsal olarak gerçeklenmiştir. Sayısal Video Yayını tarafından belirtilen standartlarda uydu sistemleri çoğul ortam iletimi için kullanılacak ileri hata düzeltme birimi, ardışıl kodlama tekniğini içermektedir. Ardışıl kodlama daha yüksek hata düzeltme performansı sağlamak amacını taşımaktadır. Bu kodlama türü, klasik kodlama türlerinin seri bir şekilde bağlanması ve aralarında bir serpiştirme işleminin kullanılması ile gerçeklenmektedir. Ardışıl kodlama; iç kodlama, dış kodlama ve serpiştirme işlemlerinden oluşmaktadır. Ardışıl kodlamada kullanılacak ve standartlarda belirtilen dış kodlama türü kısaltılmış Reed-Solomon kodlama türüdür. Tez kapsamında, Reed-Solomon kod çözme algoritması tasarlanmış ve donanımsal olarak gerçeklenmiştir. Reed-Solomon kod çözme algoritmasında en çok kullanılan aritmetik birim olan sonlu alan çarpma işlemi, parametrelere göre özelleşme olmadığı için ve hız faktörü göz önüne alındığında hücresel dizi sonlu alan çarpma işlemi seçilmiştir. Bunun yanında dış kod çözme işleminin en önemli birimi olan anahtar eşitlik çözme birimi, tezin amacına uygun olarak tersi alınmayan tekrardan formüle edilmiş Berlekamp-Massey algoritması seçilmiştir. Ters-serpiştirme işlemi, katlamalı ters-serpiştirme işlemidir. Bu işlem standartlar tarafından belirtilen parametrelere uygun olarak tasarlanmıştır. Gelen verilerin RAM?de sıralanması için adres üretici devresi ve blok RAM?i içeren iki birimden oluşmaktadır. İç kodlama, katlamalı kodlama olarak belirtilmiştir. Katlamalı kodlama türüne karşılık düşen kod çözme algoritması Viterbi algoritmasıdır. Tezin amacına uygun olarak 3-bitlik yumuşak kararlı bir Viterbi algoritması tasarlanmıştır. Viterbi algoritmasında en önemli birim olan kazanan hafıza birimi için kayıtçı değişim algoritması tasarlanmış ve başarılı bir şekilde donanımsal olarak gerçeklenmiştir. Bunun yanında Viterbi algoritmasında kullanılan topla-karşılaştır ve seç birimi tanımlanan parametrelere uygun olarak paralel bir yapıda oluşturulmuş ve gerçeklenmiştir.
Özet (Çeviri)
Significant progresses have been made in the satellite communication area; nevertheless, the solution of one point to multi point multimedia application for digital video broadcasting over large coverage area is one of the most significant progresses for home-entertainment industry. The developing of multimedia technology and digital communication system accompanies with some standards. Meanwhile, these standards are adapted to satellite communication. Digital Video Broadcasting (DVB) Project is an industry-led consortium which prepares the standard for multimedia communication. One of the standardization processes is prepared for multimedia communication by satellite called Digital Video Broadcasting-Satellite (DVB-S). A satellite communication system has three main parts; they are receiver, transmitter, and satellite. The transmitter part of satellite communication includes source coding, cryptography, channel coding, modulation, and up-conversion units. Firstly, source coding compresses the information symbol due to fact that it reduces the space of storage or transmission capacity. To secure the information symbols the cryptography is used in a communication system. Especially there is a noisy channel between communication nodes. At this point, the channel coding technique is used to find errors and sometimes correct it. Nonetheless the channel coding techniques adds the redundancy symbol to the frame. Modulation transforms the information from one domain to another domain. Up-conversion units raise the baseband frequency to the radio frequency and intermediate frequency. The receiver side of satellite communication has the reverse processes of the transmitter side. The satellite has an important mission in this system; the mission includes reflection, regeneration, and transmission. DVB-S standard specifies modulation, channel coding, and source coding characteristic for physical link and framing. Quadrature phase shift keying (QPSK) modulation was specified for digital transmission, and also eight phase shift keying (8PSK) instead of QPSK was specified to increase the data rate. Additionally, source coding technique is Moving Picture Expert Group Second edition (MPEG-2) transport stream, which has 188 byte frame length. The frame structure of source coding includes 1 synchronization byte and 187 information byte. In DVB-S, channel coding technique was specified concatenated channel coding technique, includes inner coding, interleaving, and outer coding. It is concatenated block coding with convolutional coding. Inner channel coding is shortened Reed-Solomon coding technique, which has 188 bytes to the input and generates 204 coded bytes. It has 16 parity bytes. The interleaving process is convolutional interleaving technique which improves the performance and prevents the burst errors. Outer channel coding is convolutional coding, which has one bit input and two bits output. Due to the aim of communication system which is transmission of error-free information as far as possible, the necessity of channel coding appears. Information symbols are sent from source to the destination within a channel. Communication channel can be a wire or a wireless path. Both of channel system includes noise. Channel coding technique is two types; one of them is automatic repeat-request (ARQ). ARQ can just detect the error and make destination to send the error message to the source to repeat sending message again, especially it is used in wired channels. Another one of channel coding technique is forward error correction (FEC) technique. FEC both can detect the error and correct it as far as possible. In a satellite communication system, in spite of using ARQ, FEC technique is preferred. Detection of error in FEC unit can be done because of redundancy symbols. The redundancy symbols add to the frame by channel encoding technique. Then channel decoding can correct the error with the aid of redundancy symbols. FEC technique has three main type; block coding, convolutional coding and concatenated coding. Block coding technique is the first channel coding technique in literature called hamming coding after Shannon capacity theory. Block coding add the redundancy symbols to the information symbols according to specified algorithm. Convolutional coding is different from block coding technique, it has delay units and then the information symbols get XOR process. The format of information symbols changes due to the XOR process. Concatenated coding has a different type of design; block coding concatenates with block coding, block coding concatenates with convolutional coding, and convolutional coding concatenates with convolutional coding (turbo coding). In DVB-S standard, second type of concatenated coding is preferred. This dissertation contains design and implementation of forward error correction unit for receiver part of digital multimedia broadcasting regarding to satellite communication systems. Within this scope, the standards specified by Digital Video Broadcasting organization are reviewed. Simulation of designed decoder units and de-interleaving process in MATLAB and Maple are made according to specified parametric values of standards. Hardware implementation of these units is doing successfully by VHDL. Inner coding, Reed-Solomon (RS) coding, is simulated, and made hardware implementation. Reed-Solomon coding is a non-binary cyclic coding. RS codes add 2t redundancy symbols to information symbols and can correct t error values. RS decoding includes four main units; these are syndrome calculation unit, key equation solver unit, Chien search algorithm, and Forney algorithm. Syndrome calculation unit is designed parallel structure to achieve high throughput, this unit gets the input codewords as a polynomial coefficients. It generates 2t syndromes and transmits to the key equation solver (KES) block. The main component of the RS decoder is KES block, it solves syndrome and generates locater polynomial and evaluator polynomial. Locater polynomial contains information about the error values location. Evaluator polynomial contains information about the values of errors. KES block can implementation with different algorithm; Berlekamp-Massey, Euclidean, etc? According to the aim of dissertation, reformulated inverse-free Berlekamp-Massey (RiBM) algorithm by Sarwate is preferred. Matching the algorithm with RiBM algorithm, it has design simplicity and high throughput. Chien search and Forney algorithms designed parallel structure. At the end of RS decoding, input codewords delays in finite input finite output unit and then found values and codeword make XOR process. The most crucial arithmetic process in RS decoding is finite field multiplication, cellular array multiplication is chosen for the aim of dissertation. This chose made the multiplication process in one clock cycle. In concatenated channel coding technique, interleaving process is used. Convolutional interleaving is specified by standard for DVB-S. Convolutional de-interleaving is simulated and made hardware implementation. Outer coding, convolutional channel coding, is simulated and made hardware implementation. In receiver side of communication system, the Viterbi algorithm can decode the convolutional coded information symbols. Viterbi algorithm has high error correction performance. Viterbi decoding algorithm can be design in hard decision technique and soft decision technique. Due to high performance of soft decision technique, the soft decision (SD) Viterbi decoding algorithm is preferred for this dissertation. SD Viterbi decoding has three main blocks; branch metric calculation unit, add-compare-select unit, and survivor memory unit. Branch metric calculation unit has 3-bit soft decision values, and sends the metric to other block, ACS. ACS unit has a fully parallel butterfly structure, and path metric memory. Most important block of Viterbi decoding algorithm is survivor memory unit. Survivor memory unit can be implementation by two general algorithms and their variations. These algorithms are trace-back algorithm and register-exchange algorithm. When comparing register exchange (REA) algorithm with trace-back algorithm, REA has high throughput, but takes much area and consumes high power because of fully parallel structure of REA.
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